Power quality enhancement by a solar photovoltaic-based distribution static compensator

Tarun Naruka; Debasis Tripathy; Prangya Mohanty; Tarun Naruka; Debasis Tripathy; Prangya Mohanty

doi:10.3934/electreng.2025010

AIMS Electronics and Electrical Engineering

2025, Volume 9, Issue 2: 192-214. doi: 10.3934/electreng.2025010

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Research article

Power quality enhancement by a solar photovoltaic-based distribution static compensator

1.
Department of Electrical Engineering, Swami Keshvanand Institute of Technology Management & Gramothan, Ramnagaria, Jaipur, Rajasthan, India
2.
Department of Electrical Engineering, Sandip Institute of Engineering and Management, Nashik, Maharasthra, India
3.
Department of Electrical Engineering, Veer Surendra Sai University of Technology, Burla, Odisha, India

Academic Editor: Lim Li Hong Idris

Received: 11 November 2024 Revised: 16 March 2025 Accepted: 24 March 2025 Published: 04 April 2025

This work dealt with the design and development of a distributed static compensator (DSTATCOM) for a solar photovoltaic-based grid integrated power system. The DSTATCOM injects or absorbs the reactive power in the power system which maintains the power quality of the power system. The solar photovoltaic-based grid integrated system is comprised of a multi-stage power electronic interface where a quadratic boost converter with a voltage multiplier cell and three-phase DC-AC voltage source inverter are used. The QBC-VMC converter is controlled using variable step size maximum power point tracking. The icos $\phi$ scheme was used for reference current generation as it provides better %THD than the instantaneous reactive power transfer scheme. For DC and AC voltage control, PI controllers were used. Different case studies were considered for the DSTATCOM and respective simulation and experimental analysis was provided. The icos $\phi$ -PI controller control scheme provides lower %THD that is in accordance with the IEEE-519 standard.

Keywords:

Citation: Tarun Naruka, Debasis Tripathy, Prangya Mohanty. Power quality enhancement by a solar photovoltaic-based distribution static compensator[J]. AIMS Electronics and Electrical Engineering, 2025, 9(2): 192-214. doi: 10.3934/electreng.2025010

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Abstract

1. Introduction

The concept of a microgrid has gained popularity due to its ability to integrate different distributed energy resources (DERs) such as photovoltaic, wind energy, and fuel cell, etc. Among the different DERs, the solar photovoltaic system is one of the most widely used because of the wide availability of solar irradiance and high number of sunny days across the globe. With the abundance of solar irradiance in a tropical country like India, there is wide acceptance of solar photovoltaic systems and they are installed in household and commercial applications. To encourage the use of DERs, the Government of India has provided different incentives such as a buy-back policy with feed-in-tariffs ^[1].

The hourly distribution of solar irradiance is modelled using the bimodal Weibull distribution function ^[2]. The output of the solar photovoltaic system depends on different environmental factors such as solar irradiance, partial shading, and the angle of incident. For integration of DERs to the utility grid, different power electronic converters such as the DC-DC converter and DC-AC inverter are employed ^[3]. The power electronic converter performs various tasks such as the regulation of active power, voltage and frequency regulation. Adequate control techniques are required for proper operation of the power electronic converter. A state-of-the-art review of various control schemes for the grid-tied inverter has been discussed in ^[4,5].

The substantial growth in energy consumptions and use of nonlinear loads such as an uninterrupted power supply, light dimmers, variable frequency drives, etc., burden the power system. To ease the burden on the classical power system, solar power generation is used and most of the solar power generation is carried out on the distribution network nearer to the local communities. The use of nonlinear loads effect the efficiency of the power system and the high switching frequency converters increase the harmonic components in the power system. To reduce the harmonics, passive filters are used that provide fixed compensation but it also has limitation of larger component size and resonance ^[6]. Therefore, shunt active power filters are used which mitigate the harmonics, providing reactive power compensation as well as power factor correction. There are different methods by which reactive power can be controlled and a state-of-the-art review of these techniques has been highlighted in ^[7,8,9,10]. To curtail the higher losses, different flexible AC transmission systems such as the distributed static compensator (DSTATCOM), dynamic voltage restorer (DVR), and unified power quality conditioner (UPQC), are used in the power system. Solar photovoltaic (SPV) integrated DSTATCOM has been reported in literature that can provide better power quality in the power system. The DSTATCOM is a controlled voltage source converter capable of providing both inductive and capacitive volt-ampere reactive (VAR) (Figure 1).

Figure 1. Configuration of DSTATCOM.

DownLoad: Full-Size Img PowerPoint

The DSTATCOM can act as either a source or sink of reactive power. The DSTATCOM controls the power factor, and detects and compensates for the voltage fluctuations like voltage sag, voltage swell, flickers, etc. (Figure 2). The DSTATCOM provides reactive power compensation in 1 to 2 cycles for very low voltage of 0.2 p.u ^[11]. The SPV-DSTATCOM is used for stabilizing critical induction motor load ^[12,13]. The limits of reactive power in a SPV system are discussed in ^[14,15]. The modeling and control aspects of PV-based DSTATCOM are discussed in ^[16].

Figure 2. Compensation technique of the DSTATCOM.

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Table 1. Summary of different controllers used in the DSTATCOM.

Reference	Control Scheme	Compensation	Controller Complexity
^[21]	Adaptive PI Controller	Voltage Sag and Voltage Swell	Low
^[22]	Hysteresis Current Controller	Unbalanced Load	Medium
^[23]	Model Predictive Controller	Voltage Unbalance	Medium
^[24]	Fuzzy Logic Controller	Voltage Sag and Voltage Swell	Medium
^[25]	Fractional-Order Sliding Mode Control	Voltage Sag, Voltage Swell and Unbalanced Load	Low

| Show Table

DownLoad: CSV

There are different types of controllers used for control of the DSTATCOM. There are two different types of control loops in DSTATCOM, i.e., the outer voltage loop that controls the DC link voltage and the inner current loop that generates reference current and the switching signal for the insulated-gate bipolar transistor (IGBT). To generate reference current, instantaneous reactive power theory (IRPT) ^[17], modified IRPT, and icos $\phi$ ^[18,19] techniques are widely used. For DC-link control, different controllers such as the conventional PI controller, model predictive control, etc., are used ^[20].

For grid integration of SPV systems, a power electronic interface (PEI) is used. The PEI is comprised of a DC-DC converter and DC-AC inverter ^[26]. For the DC-DC converter, most of the work uses a boost converter. The small-signal model of the PV-fed boost converter operating in CCM and DCM operating mode was discussed in ^[27,28,29]. The canonical model of the DC-DC boost converter has been used to develop a small-signal model of a PV-fed boost converter in ^[30]. Small-signal modeling of a PV-boost converter operating in incremental conductance maximum power point tracking (MPPT) and its validation using controller hardware in a loop was discussed in ^[31]. But the boost converter has several limitations such as a moderate voltage conversion ratio (VCR), high reverse recovery loss of the diode, non-minimum phase behavior ^[32], period doubling bifurcation ^[33] and high voltage stress on the switch and diode. To increase the VCR and decrease the voltage stress on the switch and diode, different non-isolated and isolated topologies of DC-DC converters are used ^[34]. Among the different non-isolated DC-DC converter topologies, a quadratic boost converter (QBC) is used which is a modified version of the cascaded boost converter ^[35,36]. The VCR of the QBC is a quadratic function of the duty cycle of the DC-DC converter, so it provides a higher VCR. The limitation of the QBC is high voltage stress on the switch, and therefore a voltage multiplier cell (VMC) ^[37] is used along with the QBC. The QBC-VMC converter provides substantially higher VCR than the boost converter and lower voltage stress than the boost converter. In the maximum power point tracking (MPPT) part of the SPV system, most of the papers use the standard perturb and observe P&O MPPT or incremental conductance MPPT. These MPPTs have a fixed step size and suffer from lower tracking efficiency and drift ^[38]. Therefore, a modified variable size P&O MPPT is used that can provide an improved tracking efficiency.

This paper provides a detailed analysis of reactive power compensation and harmonic mitigation in a grid-integrated SPV system. In this work a two-stage PEI is used where a QBC-VMC converter and 3- $\phi$ DC-AC inverter is used. For extraction of maximum power from the SPV, modified variable step size P&O MPPT is used. The DSTATCOM provides reactive power management as well as harmonic mitigation. For control of the DSTATCOM, DC voltage control and AC voltage control are used. The standard PI controllers are used for voltage control. For extraction of reference current, a Icos $\phi$ control scheme is used. Simulation and experimental analysis has been provided which validates the theoretical narrative.

The paper is organized as follows. In Section 2, the system description of the SPV-DSTATCOM is provided which is comprised of a QBC-VMC converter and DSTATCOM. Section 3 provides the control scheme of the SPV-DSTATCOM with the variable step size P&O MPPT scheme, icos $\phi$ algorithm for reference current generation, and PI controller for AC and DC voltage control. Section 4 provides simulation results of the SPV-DSTATCOM with different case studies. Section 5 provides experimental analysis and Section 6 provides concluding remarks for the paper.

2. System description

The complete power circuit and control scheme for the SPV-DSTATCOM is illustrated in . The studied system is comprised of SPV panels, a DC-DC converter, and a 3- $\phi$ voltage source inverter (VSI). The 3- $\phi$ VSI coupled with filters is connected to the distribution system using a $\Delta - Y$ isolation transformer. The filter components are used to mitigate the harmonics generated by the VSI. To limit the current ripple of the VSI, reactance of the filter inductor is selected between 0.1 to 0.25 pu. The filter capacitor $C_f$ is connected in $\Delta$ configuration and it is used to limit the exchange of reactive power below 0.05 pu of the inverter rating. The filter capacitor is connected along with damping resistor $R_d$ .

Figure 3. Power circuit and control scheme of the PV-DSTATCOM.

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The characteristics of the SPV are highly nonlinear as evident from the $V$ - $I$ and $P$ - $V$ characteristics. The output of the SPV is dependent on the climatic condition (i.e., solar irradiance, ambient temperature, tilt angle of the solar panel, soiling on the solar panel, snow conditions, etc.). The maximum power of the SPV system is generated at the knee point (MPP) of the $P$ - $V$ characteristics of the solar panel. The MPP keeps on changing with the change in climatic conditions. Therefore, the MPP tracking system is employed to track the changing MPP. To track the change of MPP, power electronic converters are used. The power electronic converter achieves impedance matching and efficiently tracks the MPP ^[39]. The SPV power is supplied to the DC bus using a DC-DC converter.

2.1. SPV panel

The generalized formula for the single-diode model can be represented as

$\begin{equation} {I_{PV}} = {I_{ph}} - {I_o}\left( {{e^{\frac{{q\left( {{V_{PV}} + {R_s}{I_{PV}}} \right)}}{{AK{T_{STC}}}}}} - 1} \right) - \frac{{{V_{PV}} + {R_s}{I_{PV}}}}{{{R_p}}} \end{equation}$

(2.1)

In Eq 2.1, there are five independent parameters, i.e., photo current $I_{PV}$ , saturation current $I_o$ , thermal voltage timing completion factor $a$ , $R_s$ , and $R_p$ .

For the analytical solution of this parameter extraction problem, Eq 2.1 is written at three key points, i.e., open circuit voltage $V_{OC}$ , short circuit current $I_{sc}$ , and maximum power point $V_{mp}$ and $I_{mp}$ .

At $I_{pv}$ = 0 and $V_{pv}$ = $V_{oc}$ ,

$\begin{equation} 0 = {I_{ph}} - {I_o}\left( {{e^{\frac{{q\left( {{V_{OC}}} \right)}}{{AK{T_{STC}}}}}} - 1} \right) - \frac{{{V_{OC}}}}{{{R_p}}} \end{equation}$

(2.2)

At $I_{pv}$ = $I_{sc}$ and $V_{pv}$ = 0,

$\begin{equation} {I_{sc}} = {I_{ph}} - {I_o}\left( {{e^{\frac{{q\left( {{V_{OC}}} \right)}}{{AK{T_{STC}}}}}} - 1} \right) - \frac{{{R_s}{I_{sc}}}}{{{R_p}}} \end{equation}$

(2.3)

At $I_{pv}$ = $I_{mp}$ and $V_{pv}$ = $V_{mp}$ ,

$\begin{equation} {I_{mp}} = {I_{ph}} - {I_o}\left( {{e^{\frac{{q\left( {{V_{mp}} + {R_s}{I_{mp}}} \right)}}{{AK{T_{STC}}}}}} - 1} \right) - \frac{{{V_{mp}} + {R_s}{I_{mp}}}}{{{R_p}}} \end{equation}$

(2.4)

The series and shunt resistance can be defined as

$\begin{equation} {R_s} = - {\left. {\frac{{d{I_{PV}}}}{{d{V_{PV}}}}} \right|_{{V_{PV}} = {V_{OC}}}} \end{equation}$

(2.5)

$\begin{equation} {R_p} = - {\left. {\frac{{d{I_{PV}}}}{{d{V_{PV}}}}} \right|_{{I_{PV}} = {I_{SC}}}} \end{equation}$

(2.6)

The diode modified quality factor at STC is

$\begin{equation} {a_{STC}} = \frac{{{V_{mp}} + {R_{so}}{I_{mp}} - {V_{OC}}}}{{\ln \left( {{I_{sc}} - \frac{{{V_{mp}}}}{{{R_{sho}}}} - {I_{mp}}} \right) - \ln \left( {{I_{sc}} - \frac{{{V_{oc}}}}{{{R_o}}}} \right) + \frac{{{I_{mp}}}}{{{I_{sc}} - \frac{{{V_{oc}}}}{{{R_{so}}}}}}}} \end{equation}$

(2.7)

The reverse leakage current at STC is

$\begin{equation} {I_{0STC}} = \left( {{I_{sc}} - \frac{{{V_{OC}}}}{{{R_p}}}} \right){e^{\left( { - \frac{{{V_{OC}}}}{a}} \right)}} \end{equation}$

(2.8)

The photocurrent at STC is

$\begin{equation} {I_{phSTC}} = {I_{sc}}\left( {1 + \frac{{{R_s}}}{{{R_p}}}} \right) + {I_o}{e^{\left( {\frac{{{I_{sc}}{R_s}}}{a} - 1} \right)}} \end{equation}$

(2.9)

2.2. QBC-VMC converter

The resistance seen by the solar module is

$\begin{equation} {R_{in}} = f\left( d \right){R_o} \end{equation}$

(2.10)

where $R_{in}$ is the input resistance of the converter, and $R_o$ is the output resistance of the converter. The function of duty cycle that depends on the converter selection is $f\left(d \right) \in \left\{ {0, 1} \right\}$ .

There are different types of DC-DC converter topologies available in the literature and the topologies can be broadly classified as non-isolated DC-DC converter topology and isolated DC-DC converter topology. Among non-isolated converter topology, most of the power electronic design engineer uses a step-up DC-DC boost-type converter.

The load inclination angle of the PV-fed boost converter feeding a resistive load is

$\begin{equation} \theta = {\tan ^{ - 1}}\left( {\frac{1}{{{{\left( {1 - d} \right)}^2}R}}} \right) \end{equation}$

(2.11)

When $d = 0$ , the minimum load inclination angle is $\theta = {\tan ^{ - 1}}\left({\frac{1}{R}} \right)$ and when $d = 1$ , the maximum load inclination angle is 90 $^\circ$ .

The temperature range that ensures the system is operating on the tracking region is defined as

$\begin{equation} T \ge {T^{STC}} - \frac{{{V_{DC}} - V_{mp}^{STC}}}{{\left| {{\mu _{Vmp}}} \right|}} \end{equation}$

(2.12)

where ${{\mu _{Vmp}}}$ is the temperature voltage co-efficient.

But the boost-type converter has different limitations such as a lower voltage conversion ratio (VCR), higher reverse recovery losses of the power diode, and non-minimum phase behavior of the transfer function of the boost converter. To mitigate the limitations of the boost converter, a quadratic boost converter (QBC) is employed. In a QBC, the VCR is the quadratic function of the duty cycle. Though the QBC improves the VCR, the voltage stress on the switch of the QBC is very high. To reduce the voltage stress on the switch of the QBC, a diode-capacitor voltage multiplier cell (VMC) is used.

The comparison of different DC-DC converters is shown in . The QBC-VMC converter () is comprised of 4 diodes $D_1$ to $D_4$ , 3 inductors $L_o$ to $L_2$ , and 4 capacitors. The input capacitor with the SPV system is used to mitigate any ripple in the SPV voltage. The switch is controlled using a PWM signal computed from variable step size MPPT. The detailed analysis of the QBC-VMC converter integrated with a SPV panel can be found in ^[40].

Table 2. Comparative analysis of different DC-DC converters.

	Boost Converter	QBC	QBC-VMC (This work)
Switches	1	1	1
Diodes	1	3	4
Inductors	1	2	3
Capacitors	1	2	4
VCR	$\frac{1}{{1 - d}}$	$\frac{1}{{{{\left({1 - d} \right)}^2}}}$	$\frac{{1 + d}}{{{{\left({1 - d} \right)}^2}}}$
Voltage stress of switch	$V_{DC}$	$V_{DC}$	$\frac{{{V_{DC}}}}{{1 + d}}$
Voltage stress across diode	$V_{DC}$	$V_{DC}$	$\frac{{\left({1 - d} \right){V_{DC}}}}{{1 + d}}$

| Show Table

DownLoad: CSV

Figure 4. Circuit diagram of the QBC-VMC converter.

DownLoad: Full-Size Img PowerPoint

2.3. DSTATCOM

Using the Kirchoff Voltage Law at point of common coupling (PCC), we get

$\begin{equation} \begin{array}{l} {V_{as}} = {i_{as}}{R_f} + {L_f}\frac{{d{i_{as}}}}{{dt}} + {V_{sa}} \\ {V_{bs}} = {i_{bs}}{R_f} + {L_f}\frac{{d{i_{bs}}}}{{dt}} + {V_{sb}} \\ {V_{cs}} = {i_{cs}}{R_f} + {L_f}\frac{{d{i_{cs}}}}{{dt}} + {V_{sc}} \\ \end{array} \end{equation}$

(2.13)

Equation 2.13 can be written in matrix form as

$\begin{equation} \frac{d}{{dt}}\left[ \begin{array}{l} {i_{as}} \\ {i_{bs}} \\ {i_{cs}} \\ \end{array} \right] = \left[ {\begin{array}{*{20}{c}} { - \frac{{{R_f}}}{{{L_f}}}} & 0 & 0 \\ 0 & { - \frac{{{R_f}}}{{{L_f}}}} & 0 \\ 0 & 0 & { - \frac{{{R_f}}}{{{L_f}}}} \\ \end{array}} \right]\left[ \begin{array}{l} {i_{as}} \\ {i_{bs}} \\ {i_{cs}} \\ \end{array} \right] + \frac{1}{{{L_s}}}\left[ \begin{array}{l} {V_{as}} - {V_{sa}} \\ {V_{bs}} - {V_{sb}} \\ {V_{cs}} - {V_{sc}} \\ \end{array} \right] \end{equation}$

(2.14)

Using Park's transformation, we get

$\begin{equation} \left[ \begin{array}{l} {i_d} \\ {i_q} \\ {i_0} \\ \end{array} \right] = \frac{2}{3}\left[ {\begin{array}{*{20}{c}} {\cos \theta } & {\cos \left( {\theta - \frac{{2\pi }}{3}} \right)} & {\cos \left( {\theta + \frac{{2\pi }}{3}} \right)} \\ { - \sin \theta } & { - \sin \left( {\theta - \frac{{2\pi }}{3}} \right)} & { - \sin \left( {\theta + \frac{{2\pi }}{3}} \right)} \\ {0.5} & {0.5} & {0.5} \\ \end{array}} \right]\left[ \begin{array}{l} {i_{as}} \\ {i_{bs}} \\ {i_{cs}} \\ \end{array} \right] \end{equation}$

(2.15)

Equation 2.15 can be written as

$\begin{equation} \frac{d}{{dt}}\left[ \begin{array}{l} {i_d} \\ {i_q} \\ \end{array} \right] = \left[ {\begin{array}{*{20}{c}} { - \frac{{{R_f}}}{{{L_f}}}} & \omega \\ \omega & { - \frac{{{R_f}}}{{{L_f}}}} \\ \end{array}} \right]\left[ \begin{array}{l} {i_d} \\ {i_q} \\ \end{array} \right] + \frac{1}{{{L_f}}}\left[ \begin{array}{l} {e_d} - {v_d} \\ {v_q} - {e_q} \\ \end{array} \right] \end{equation}$

(2.16)

$\begin{equation} \frac{d}{{dt}}\left[ \begin{array}{l} {i_d} \\ {i_q} \\ \end{array} \right] = \left[ {\begin{array}{*{20}{c}} { - \frac{{{R_f}}}{{{L_f}}}} & \omega \\ \omega & { - \frac{{{R_f}}}{{{L_f}}}} \\ \end{array}} \right]\left[ \begin{array}{l} {i_d} \\ {i_q} \\ \end{array} \right] + \left[ \begin{array}{l} {x_1} \\ {x_2} \\ \end{array} \right] \end{equation}$

(2.17)

In Eq 2.17,

$\begin{equation} \begin{array}{l} {x_1} = \frac{1}{{{L_f}}}\left( {{e_d} - {v_d}} \right) \\ {x_2} = - \frac{1}{{{L_f}}}{e_q} \\ \end{array} \end{equation}$

(2.18)

where

$\begin{equation} \begin{array}{l} {e_d} = k{V_{dc}}\cos \alpha \\ {e_q} = k{V_{dc}}\sin \alpha \\ \end{array} \end{equation}$

(2.19)

3. Control scheme for the SPV-DSTATCOM

The complete SPV-DSTATCOM control scheme is comprised of the following controller and auxiliary blocks:

● MPPT Unit: For tracking of MPPT in SPV panel and impedance matching with DC-DC converter

● AC Controller

● Phase Locked Loop

● DC Controller

3.1. Variable step size P&O MPPT

An MPPT system is used to provide impedance matching to the SPV panel in varying environmental parameters. The traditional perturb and observe MPPT has fixed perturbation size that has large oscillations in a steady-state condition. Therefore, variable step size MPPT is used (). In variable step size MPPT, the current and voltage of the SPV panel $V_{PV}$ and $I_{PV}$ are measured and passed through a low pass filter of cut off frequency 1 kHz. The power of the SPV panel is determined by multiplying $V_{PV}$ and $I_{PV}$ . The P&O MPPT and two PI controllers are used in variable step size MPPT and the output of MPPT is provided to the PWM unit to generate switching signals to the QBC-VMC converter.

Figure 5. Variable step size MPPT.

DownLoad: Full-Size Img PowerPoint

3.2. PLL

The PLL is comprised of a feedback loop based on a synchronous rotating frame (SRF-PLL) can precisely extract a voltage synchronization signal from 3- $\phi$ grid voltage that is symmetrical and without any distortion. The SRF-PLL is used in stiff-grid conditions. Consider a balanced 3- $\phi$ utility grid voltage,

$\begin{equation} {v_{abc}} = {V_m}\left( \begin{array}{l} \cos \theta \\ \cos \left( {\theta - \frac{{2\pi }}{3}} \right) \\ \cos \left( {\theta + \frac{{2\pi }}{3}} \right) \\ \end{array} \right) \end{equation}$

(3.1)

Using the Clarke transform, the utility voltage can be transformed into SRF:

$\begin{equation} {v_{\alpha \beta }} = \frac{2}{3}\left( {\begin{array}{*{20}{c}} 1 & { - 0.5} & { - 0.5} \\ 0 & { - \frac{{\sqrt 3 }}{2}} & { - \frac{{\sqrt 3 }}{2}} \\ \end{array}} \right){v_{abc}} \end{equation}$

(3.2)

The $d$ - $q$ transformation is represented as

$\begin{equation} {v_{qd}} = \left( {\begin{array}{*{20}{c}} {\cos \hat \theta } & { - \sin \hat \theta } \\ {\sin \hat \theta } & {\cos \hat \theta } \\ \end{array}} \right){v_{\alpha \beta }} \end{equation}$

(3.3)

The direct component voltage can be represented as

$\begin{equation} {v_d} = {V_m}\sin \left( {\hat \theta - \theta } \right) = {E_m}\sin \delta \end{equation}$

(3.4)

The angular frequency of PLL can be represented as

$\begin{equation} \hat \omega = \frac{{d\hat \theta }}{{dt}} = {K_f}e \end{equation}$

(3.5)

where $K_f$ is the loop gain of the transfer function.

The frequency and phase angle of the PLL is used to track the frequency and phase angle of the utility grid.

3.3. icos $\phi$ -based reference current extraction

The control scheme of the DSTATCOM is illustrated in where the load currents $i_{La}$ , $i_{Lb}$ , and $i_{Lc}$ are measured and these currents have a lot of harmonics as represented in Eq 3.6. The load currents are decomposed into three different components such as the fundamental direct component, fundamental quadrature component, and harmonic component as represented in Eq 3.7. To extract the fundamental component of the load current, the load current is passed through a second-order low pass filter (the cut-off frequency $f_c$ of LPF is 50 Hz).

Figure 6. Control scheme of DSTATCOM.

DownLoad: Full-Size Img PowerPoint

$\begin{equation} \begin{array}{l} {i_{La}} = {i_{Lfa}}\sin \left( {\omega t - {\theta _a}} \right) + \sum\limits_{n = 2}^\infty {{I_{Lna}}\sin } \left( {n\omega t - {\theta _{na}}} \right) \\ {i_{Lb}} = {i_{Lfb}}\sin \left( {\omega t - {\theta _b}} \right) + \sum\limits_{n = 2}^\infty {{I_{Lnb}}\sin } \left( {n\omega t - {\theta _{nb}}} \right) \\ {i_{Lc}} = {i_{Lfc}}\sin \left( {\omega t - {\theta _c}} \right) + \sum\limits_{n = 2}^\infty {{I_{Lnc}}\sin } \left( {n\omega t - {\theta _{nc}}} \right) \\ \end{array} \end{equation}$

(3.6)

$\begin{equation} \begin{array}{l} {i_{La}} = {I_{Lfa}}\cos {\theta _a} + {I_{Lfa}}\sin {\theta _a} + {\rm{Harmonic Component}} \\ {i_{Lb}} = {I_{Lfb}}\cos {\theta _b} + {I_{Lfb}}\sin {\theta _b} + {\rm{Harmonic Component}} \\ {i_{Lc}} = {I_{Lfc}}\cos {\theta _c} + {I_{Lfc}}\sin {\theta _c} + {\rm{Harmonic Component}} \\ \end{array} \end{equation}$

(3.7)

For DC-link voltage regulation, a proportional-integral (PI) controller is used and similarly, the voltage oscillation in PCC is regulated using the PI controller which can be represented as

$\begin{equation} G_c^{PI}\left( s \right) = \frac{{{K_p}s + {K_i}}}{{s\left( {1 + \lambda s} \right)}} \end{equation}$

(3.8)

where $K_p$ is the proportional gain and $K_i$ is the integral gain of the PI controller and $\lambda$ is the filter coefficient.

A frequency response-based method is used to find the gain and phase margin of the system and using the gain and phase margin, the values of $K_p$ and $K_i$ can be found out.

The direct unit vector component of 3- $\phi$ balanced supply voltage can be expressed as Eq 3.9:

$\begin{equation} \left[ \begin{array}{l} {u_{da}} \\ {u_{db}} \\ {u_{dc}} \\ \end{array} \right] = \frac{1}{{\sqrt {\frac{2}{3}\left( {v_{sa}^2 + v_{sb}^2 + v_{sc}^2} \right)} }}\left[ {\begin{array}{*{20}{c}} 1 & 0 & 0 \\ 0 & 1 & 0 \\ 0 & 0 & 1 \\ \end{array}} \right]\left[ \begin{array}{l} {v_{sa}} \\ {v_{sb}} \\ {v_{sc}} \\ \end{array} \right] \end{equation}$

(3.9)

The quadrature unit vector component of 3- $\phi$ balanced supply voltage can be expressed as Eq 3.10:

$\begin{equation} \left[ \begin{array}{l} {u_{qa}} \\ {u_{qb}} \\ {u_{qc}} \\ \end{array} \right] = \frac{1}{{2\sqrt 3 }}\left[ {\begin{array}{*{20}{c}} 0 & { - 2} & 2 \\ 3 & 1 & { - 1} \\ { - 3} & 1 & { - 1} \\ \end{array}} \right]\left[ \begin{array}{l} {u_{da}} \\ {u_{db}} \\ {u_{dc}} \\ \end{array} \right] \end{equation}$

(3.10)

Reference source current is used to obtain the desired switching pulses for the DSTATCOM. The direct component of the reference source current is expressed as

$\begin{equation} \left[ \begin{array}{l} i_{sad}^* \\ i_{sbd}^* \\ i_{scd}^* \\ \end{array} \right] = {I_{sd}}\left[ {\begin{array}{*{20}{c}} 1 & 0 & 0 \\ 0 & 1 & 0 \\ 0 & 0 & 1 \\ \end{array}} \right]\left[ \begin{array}{l} {u_{da}} \\ {u_{db}} \\ {u_{dc}} \\ \end{array} \right] \end{equation}$

(3.11)

The quadrature component of the reference source current is computed as

$\begin{equation} \left[ \begin{array}{l} i_{saq}^* \\ i_{sbq}^* \\ i_{scq}^* \\ \end{array} \right] = {I_{sq}}\left[ {\begin{array}{*{20}{c}} 1 & 0 & 0 \\ 0 & 1 & 0 \\ 0 & 0 & 1 \\ \end{array}} \right]\left[ \begin{array}{l} {u_{qa}} \\ {u_{qb}} \\ {u_{qc}} \\ \end{array} \right] \end{equation}$

(3.12)

The current error can be computed by subtracting the sensed source current from the reference source current and the current error is processed through a hysteresis current control scheme to generate the desired switching pulses. For pulse width modulation (PWM) generation, sinusoidal PWM is used. The generated switching pulses are provided to the 2-level IGBT-based VSI using an appropriate gate driver and isolation circuit.

4. Simulation results

For simulation of the SPV-fed DSTATCOM and validation of its control schemes using MATLAB-Simulink, the simulation parameters in Table 3 are considered.

Table 3. Simulation parameters.

SPV	Power at STC Voltage at MPP Current at MPP Short Circuit Current Open Circuit Voltage	$P_{STC}$ $V_{mp}$ $I_{mp}$ $I_{sc}$ $V_{oc}$	305 W 54.7 V 5.58 A 5.98 A 64.2 V
SPV Array	Number of series connected modules Number of parallel connected modules	$N_s$ $N_p$	5 66
QBC-VMC Converter	Input Capacitor Inductor Capacitor Switching Frequency	$C_{in}$ $L$ $C$ $f_{sw}$	100 $\mu$ F 60 $\mu$ H, 260 $\mu$ H, 750 $\mu$ H 15 $\mu$ F, 4.7 $\mu$ F, 0.33 $\mu$ F 20 kHz
VSI (DSTATCOM)	Switching Frequency	$f_{sw}$	20 kHz
Passive Filter	Filter Inductance	$L_f$	3 mH
Grid Voltage			440 V
Grid Impedance			$R_s$ = 0.1 $\Omega$ , $L_s$ = 0.1 mH

| Show Table

DownLoad: CSV

Algorithm 1: Design procedure for QBC-VMC converter.
1 Step 1: Measure the SPV module voltage and current $V_{PV}$ , $I_{PV}$ and compute power $P_{PV}$
2 Step 2: The DC-link voltage is
$V_{DC} = \frac{{2\sqrt 2 {V_{LL}}}}{{\sqrt 3 m}}$	(4.1)
In Eq. 4.1, $m$ denotes the modulation index of VSI
3 Step 3: Due to any voltage surge, energy absorbed by the DC-link capacitor is
$\Delta {P_{dc}}\Delta t = \frac{1}{2}{C_{dc}}{\left({{V_{DC}} + \Delta {V_{DC}}} \right)^2} - \frac{1}{2}{C_{dc}}V_{DC}^2$	(4.2)
In Eq. 4.2, $\Delta {P_{dc}}$ is the change in power, $\Delta t$ is the time of the voltage surge, and the magnitude of fluctuation of the DC-link is
$\Delta {V_{DC}} = {\rm{ }}\frac{{\Delta {P_{dc}}\Delta t}}{{{C_{dc}}{V_{DC}}}}$	(4.3)
4 Step 4: The design parameters of the QBC-VMC converter are the input voltage $V_{PV}$ , output voltage $V_{DC}$ , and switching frequency $f_{sw}$ . Compute $d$
5 Step 5: The maximum allowable current ripple in $L_1$ , $L_2$ , and $L_o$ , is $\Delta {i_{{L_1}}}$ , $\Delta {i_{{L_2}}}$ , and $\Delta {i_{{L_o}}}$ respectively
$\Delta {i_{{L_1}}} = \frac{{{V_{PV}}d}}{{{f_{sw}}{L_1}}}$	(4.4)
$\Delta {i_{{L_2}}} = \frac{{{V_{PV}}d}}{{{f_{sw}}{L_2}\left({1 - d} \right)}}$	(4.5)
$\Delta {i_{{L_o}}} = \frac{{{V_{PV}}\left({1 + d} \right)}}{{R{{\left({1 - d} \right)}^2}}}$	(4.6)
6 Step 6: The maximum allowable voltage ripple for each capacitor is:
$\Delta {v_{{c_1}}} = \frac{{{V_{PV}}d{{\left({1 + d} \right)}^2}}}{{R{C_1}{f_{sw}}{{\left({1 - d} \right)}^3}}}$	(4.7)
$\Delta {v_{{c_s}}} = \frac{{{V_{PV}}d\left({1 + d} \right)}}{{R{C_s}{f_{sw}}{{\left({1 - d} \right)}^2}}}$	(4.8)
$\Delta {v_{{c_o}}} = \frac{{{V_{PV}}d}}{{8{L_o}{C_o}f_{sw}^2\left({1 - d} \right)}}$	(4.9)
7 Step 7: For continuous conduction mode (CCM) operation of the QBC-VMC converter, the inductors need to satisfy the following limits:
${L_1} = \frac{{Rd{{\left({1 - d} \right)}^4}}}{{2{f_{sw}}{{\left({1 + d} \right)}^2}}}$	(4.10)
${L_2} = \frac{{Rd{{\left({1 - d} \right)}^2}}}{{2{f_{sw}}{{\left({1 + d} \right)}^2}}}$	(4.11)
${L_o} = \frac{{Rd\left({1 - d} \right)}}{{2{f_{sw}}\left({1 + d} \right)}}$	(4.12)
8 Step 8: The input capacitor of QBC-VMC $C_{in}$ is designed to filter out the current ripples produced by $L_1$ . The maximum allowable voltage ripple for the input capacitor is denoted as $V_{mp}$ , the maximum duty cycle of the converter is $d_{max}$ :
${C_{in}} = \frac{{{d_{\max }}}}{{8{L_1}f_{sw}^2\Delta {V_{mp}}}}$	(4.13)
9 Step 9: Calculation of the minimum value of the output capacitor:
${C_o} = \frac{{{I_o}d}}{{\Delta {V_{{c_o}}}{f_{sw}}}}$	(4.14)
10 Step 10: The DC-link capacitor for power balance between the converter and inverter is calculated as
${C_{dc}} = \frac{{0.9{I_{peak}}}}{{4\sqrt 2 \pi f\Delta {V_{DC}}}}$	(4.15)
In Eq.4.15, $I_{peak}$ is the maximum peak AC current, and $f$ is the grid frequency.

4.1. Performance evaluation of the MPPT

The DC-link voltage at a standard test condition (STC) (solar irradiance of 1000 W/ $m^2$ and temperature of 25 $^ \circ {\rm{C}}$ ) is shown in Figure 7(a) where the reference DC link voltage is tracked by the MPPT scheme. During the ramp increase in solar irradiance, the reference DC-link voltage is maintained by the MPPT scheme (Figure 7(b)). The DC-link voltage with non-uniform solar irradiance is shown in Figure 7(c) where there is a sharp decrease of solar irradiance at 1 min and a sharp increase of the solar irradiance. The resultant PV voltage and PV current are shown. The DC-link voltage is maintained by the MPPT scheme.

Figure 7. (a) DC voltage at uniform irradiance, (b) DC voltage at a ramp increase in solar irradiance, (c) DC bus voltage at non-uniform solar irradiance.

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4.2. Case Ⅰ: Performance of the DSTATCOM with ideal supply voltage and nonlinear load

In , the ideal supply voltage and its respective source current at nonlinear load is provided. The total harmonic distortion of the source current is found to be 30.92% (). The THD is very high before compensation, therefore, the icos $\phi$ controller is used for compensation. The simulation results of the source current after compensation are shown in Figure 10.

Figure 8. (a) Ideal supply voltage and (b) source current at nonlinear load (before compensation).

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Figure 9. %THD of source current (before compensation).

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Figure 10. Simulation results of the SPV-fed DSTATCOM with the source current after compensation.

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4.3. Case Ⅱ: Performance of the DSTATCOM with nonlinear and linear load

Figure 11 illustrates the performance evaluation of the PV-fed DSTATCOM with both linear and nonlinear load. The load current before compensation is shown in , the source current after compensation with IRPT is shown in . The source current after compensation with the icos $\phi$ algorithm is shown in . The compensating current with the icos $\phi$ algorithm is shown in Figure 11(d).

Figure 11. (a) Load current before compensation, (b) source current after compensation using IRPT, (c) source current after compensation using the icos

$\phi$ algorithm, (d) compensating current with the icos

$\phi$ algorithm.

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4.4. Case Ⅲ: Performance of the DSTATCOM with nonlinear load and distorted supply voltage

The performance of the DSTATCOM with distorted supply voltage and nonlinear load is shown in Figure 12 where Figure 12(a) illustrates the distorted supply voltage, Figure 12(b) illustrates the load current before compensation, Figure 12(c) illustrates the source current after compensation, and Figure 12(d) illustrates the compensating current provided by the DSTATCOM.

Figure 12. (a) Distorted supply voltage, (b) load current before compensation, (c) source current after compensation, (d) compensating current.

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The comparative analysis of the %THD in the source current for different case studies of the SPV-DSTATCOM is shown in . The uncompensated system has higher %THD whereas the best %THD is provided by the icos $\phi$ control scheme.

Table 4. Comparative analysis of %THD in source current.

		$I_a$	$I_b$	$I_c$
Case-Ⅰ	Without compensator IRPT icos $\phi$	30.92 4.79 3.45	30.87 4.81 3.6	30.76 4.89 3.52
Case-Ⅱ	Without compensator IRPT icos $\phi$	29.45 3.81 2.51	29.67 3.76 2.51	29.75 3.75 2.44
Case-Ⅲ	Without compensator IRPT icos $\phi$	40.18 5.71 4.15	41.05 5.98 4.55	40.54 5.76 4.61

| Show Table

DownLoad: CSV

5. Experimental analysis

The schematic diagram of experimental validation for the SPV-DSTATCOM is shown in Figure 13. The experimental setup is comprised of the following units:

Figure 13. Schematic diagram of the experimental validation of the SPV-DSTATCOM.

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● Power circuit for the QBC-VMC converter and 3- $\phi$ VSI

● Voltage and current measurement (Hall effect voltage sensor and Hall effect current sensor)

● Nonlinear load (diode bridge rectifier)

● Auxiliary power sources

● dSPACE controller with personal computer

● IGBT driver circuit

● MOSFET driver circuit

● Deadband circuit and isolation circuit

For the experimental validation of the PV-DSTATCOM, six IKW40N120H3 IGBTs are used. The rating of IKW40N120H3 is $V_{CE}$ = 1200 V, $I_c$ = 40 A, and the maximum junction temperature is 175 $^ \circ {\rm{C}}$ . For the MOSFET of the QBC-VMC, STB20NM60 ( $V_{DS}$ = 600 V, $I_D$ = 20 A, $R_{DS}$ = 0.25 $\Omega$ ) is used. For the MOSFET driver MC34151 is used. The voltage and current measurements are carried out using Hall effect sensors LV55 and LA25. The regulated dual power supply of $\pm$ 15 V is required for the Hall effect sensor. The voltage and current signals are provided to the dSPACE controller. The dSPACE controller digitizes the signals and carries out different computations. For the 3- $\phi$ IGBT isolated gate driver, 6EDL04I065PRXUMA is used. The different computations carried out in the dSPACE controllers in 1 machine cycle are (a) grid synchronization, (b) reference current generation, (c) voltage controller, (d) SPWM generation, (e) MPPT computation. The experimental results obtained from the experimental setup before and after compensation are shown in Figure 14(a) and Figure 15(a), respectively. For measurement of %THD, power quality analyzer Kusam-Meco KM2100 multifunction power and harmonics analyzer is used. Figure 14(b) and Figure 15(b) illustrate the %THD of the source current before and after compensation.

Figure 14. (a) Voltage and current before compensation (b) %THD before compensation.

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Figure 15. (a) Voltage and current after compensation (b) %THD after compensation.

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6. Conclusions

This paper provides detailed modeling and control aspects of the grid-integrated SPV-DSTATCOM. A detail operation of the SPV-DSTATCOM has been provided with limits of the reactive power in the power system as well as different mode of operations of the SPV-DSTATCOM. The two-stage PEI is comprised of the QBC-VMC converter and DSTATCOM. The QBC-VMC converter is controlled using the variable step size MPPT algorithm. The icos $\phi$ algorithm is used for the reference current and unit template generation for DSTATCOM control. The PI controller is used for DC and AC voltage control. Different case studies are considered and simulation results have been provided. From the simulation results it can be found out that the DSTATCOM is able to provide reactive power compensation as well as harmonic mitigation in different case studies. To validate the simulation results, experimental analysis is provided.

Author contributions

Tarun Naruka: Conceptualization, Software, Investigation, Writing ‒ original draft, Writing ‒ review and editing; Debasis Tripathy: Writing ‒ original draft; Prangya Mohanty: Software, Investigation. All authors have read and agreed to the published version of the manuscript.

Use of Generative-AI tools declaration

The authors declare that they have not used any Artificial Intelligence (AI) tools in the creation of this article.

Conflict of interest

All authors declare no conflicts of interest in this paper.

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通讯作者: 陈斌, bchen63@163.com

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沈阳化工大学材料科学与工程学院沈阳 110142

AIMS Electronics and Electrical Engineering

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AIMS Electronics and Electrical Engineering

Power quality enhancement by a solar photovoltaic-based distribution static compensator

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Abstract

1. Introduction

2. System description

2.1. SPV panel

2.2. QBC-VMC converter

2.3. DSTATCOM

3. Control scheme for the SPV-DSTATCOM

3.1. Variable step size P&O MPPT

3.2. PLL

3.3. icos $\phi$ -based reference current extraction

4. Simulation results

4.1. Performance evaluation of the MPPT

4.2. Case Ⅰ: Performance of the DSTATCOM with ideal supply voltage and nonlinear load

4.3. Case Ⅱ: Performance of the DSTATCOM with nonlinear and linear load

4.4. Case Ⅲ: Performance of the DSTATCOM with nonlinear load and distorted supply voltage

5. Experimental analysis

6. Conclusions

Author contributions

Use of Generative-AI tools declaration

Conflict of interest

References

Reader Comments

通讯作者: 陈斌, bchen63@163.com

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AIMS Electronics and Electrical Engineering

Power quality enhancement by a solar photovoltaic-based distribution static compensator

Related Papers:

Abstract

1. Introduction

2. System description

2.1. SPV panel

2.2. QBC-VMC converter

2.3. DSTATCOM

3. Control scheme for the SPV-DSTATCOM

3.1. Variable step size P&O MPPT

3.2. PLL

3.3. icosϕ \phi -based reference current extraction

4. Simulation results

4.1. Performance evaluation of the MPPT

4.2. Case Ⅰ: Performance of the DSTATCOM with ideal supply voltage and nonlinear load

4.3. Case Ⅱ: Performance of the DSTATCOM with nonlinear and linear load

4.4. Case Ⅲ: Performance of the DSTATCOM with nonlinear load and distorted supply voltage

5. Experimental analysis

6. Conclusions

Author contributions

Use of Generative-AI tools declaration

Conflict of interest

References

Reader Comments

通讯作者: 陈斌, bchen63@163.com

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3.3. icos $\phi$ -based reference current extraction