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Two-stage iterated greedy algorithm for distributed flexible assembly permutation flowshop scheduling problems with sequence-dependent setup times

  • Published: 20 May 2025
  • MSC : 68T40, 68W20

  • In this study, the distributed flexible assembly permutation flowshop scheduling problem (DFAPFSP) with sequence-dependent setup times and makespan criterion was investigated. The DFAPFSP comprises two distinct phases: a distributed permutation flowshop in the initial stage, followed by an integration phase. The integration stage, which employs multiple parallel assembly machines, achieves significantly higher throughput efficiency compared to monolithic assembly machine architectures in high-volume manufacturing scenarios. A novel mixed-integer linear programming model was established to describe the problem. The DFAPFSP can be divided into two stages: production and assembly. A two-stage iterated greedy (TSIG) algorithm was designed based on the two-stage characteristics of the DFAPFSP. In the first stage, the production plan is optimized, and in the second stage, the assembly plan is optimized. The destruction, reconstruction, and local search algorithms in the two stages and acceptance criterion were redesigned. Numerous computational experiments and performance evaluations were performed by comparing the TSIG algorithm with state-of-the-art algorithms. The results and discussions show that the proposed TSIG algorithm is better than its peers for solving the DFAPFSP.

    Citation: Yuan-Zhen Li, Lei-Lei Meng, Biao Zhang. Two-stage iterated greedy algorithm for distributed flexible assembly permutation flowshop scheduling problems with sequence-dependent setup times[J]. AIMS Mathematics, 2025, 10(5): 11488-11513. doi: 10.3934/math.2025523

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  • In this study, the distributed flexible assembly permutation flowshop scheduling problem (DFAPFSP) with sequence-dependent setup times and makespan criterion was investigated. The DFAPFSP comprises two distinct phases: a distributed permutation flowshop in the initial stage, followed by an integration phase. The integration stage, which employs multiple parallel assembly machines, achieves significantly higher throughput efficiency compared to monolithic assembly machine architectures in high-volume manufacturing scenarios. A novel mixed-integer linear programming model was established to describe the problem. The DFAPFSP can be divided into two stages: production and assembly. A two-stage iterated greedy (TSIG) algorithm was designed based on the two-stage characteristics of the DFAPFSP. In the first stage, the production plan is optimized, and in the second stage, the assembly plan is optimized. The destruction, reconstruction, and local search algorithms in the two stages and acceptance criterion were redesigned. Numerous computational experiments and performance evaluations were performed by comparing the TSIG algorithm with state-of-the-art algorithms. The results and discussions show that the proposed TSIG algorithm is better than its peers for solving the DFAPFSP.



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